| Dimensions are in millimeter |
| Pkg type | AO | BO | W | DO | D1 | E1 | E2 | F | P1 | PO | KO | T | We | Te |
| T0252 (24m m) | 6 9 +/-0 1 | 10 50 +/-010 | 16 0 | 1 55 +/-0 05 | 1 5 +/-0 1 | 1 75 +/-010 | 14 25 min | 7 50 +/-0 1 | 8 0 +/-01 | 4 0 +/-01 | 2 65 +/-0 1 | 0 30 +/-0 05 | 1 3 0 +/-0 3 | 0 06 +/-0 02 |
| | | | | | | | | | | | | | |
Main Control Loop The LTC1877 uses a constant frequency, current mode step-down architecture. Boththe main (P-channeIMOSFET) and synchronous (N-channeIMOSFET) switchesare inter- nal. During normal operation, the internal top power MOSFET is turned on each cycle when the oscillator sets the RS latch,and turned off when the current comparator, ICOMP, resets the RS latch. The peak inductor current at which ICOMP resetsthe RSlatch is controlled bythe voltage on the ITH pin,which isthe output of erroramplifier EA. The VFB pin, described in the Pin Functions section, allows EA to receive an output feedback voltage from an external resistive divider. When the load current increases, it causes a slight decrease in the feedback voltage relative to the 0.8V reference, which in turn, causes the ITH voltage to increase until the average inductor current matches the new load current. While the top MOSFETis off, the bottom MOSFET is turned on until either the inductor current starts to reverse as indicated by the current reversal comparator IRCMP, or the beginning of the next clock cycle.