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TPSC107M0060150 Datasheet
The 4193 circuit uses a two stage subranging technique. First the input is approximated to seven bits. Then the seven bit word is applied to an accurate 12 bit DAC. The output of the DAC and the input are subtracted and amplified to create an error signal which is then digitized to seven bits. Combining the first and second seven bit word results in a 12 bit accurate result. See Figure l, Pin Connections and Block Diagram.
TPSC107M0060150 Price
1Repetitve avalanche causes additional power losses that can be calculated asPAV=EAR*f. 2Co(er) is a fixed capacitance that gives the same stored energy as Coss while V)s is rising from o t0 80% VDSS 3Co(tr) is a fixed capacitance that gives the same charging time as Coss while VDS iS rising from o t0 80% VDSS.
TPSC107M0060150 on stock

Parameter Symbol Conditions Min Typ. Max Unit
SUPPLY CURRENT
Supply current 1 ICCO VcC=5.5V CE=H, RPM=L 1.0 2.0 mA
Supply current 2 ICC VcC=5.5V, CE=L 1 5 23 mA
CHIP ENABLE
Input current ICE CE=05V 5 1 0 A
Input low voltage VCEL 1.0 V
Input high voltage VCEH 3.5 V
RPM SELECT
Input current IRPM CE=05V 5 1 0 uA
Input low voltage VRPML 1.0 V
Input high voltage VRPMH 3.5 V
HALL AMP
Input resistance note RIN 1 1 0 kQ
Common mode input voltage range note VCOM 2.0 VCC V
Differential input voltage range note VDIF 140 420 mVPP
START-UP
Hall bias voltage 1 VHB1 IH=4mA, CE=L 2.3 2.5 2.7 V
Hall bias voltage 2 VHB2 IH=lOmA, CE=L 2.7 2.9 3.1 V
Reference voltage Vref 10=1 mA, CE=L 1.7 2.2 2.7 V
Bias o current IHOFF VH=5.5V, CE=H 5 1 0 A
OUTPUT AMP
Leakage current ICER 0.5 1 mA
Saturation voltage 1 Vsatl 10=0.35A 1.0 1.2 V
Saturation voltage 2 Vsat2 10=0.7A 1.3 1.8 V
BUFFER & CONTROLAMP
Voltage gain l note GCT1 11 dB
Reference voltage l note Vrefl Current limiter voltage O205 0.208 0.210 V
Reference voltage 2 note Vref2 Control begin voltage O69 V


k f-l~Hz vCs= OV
l Ciss
L
j l Coss
f Crss
L