| Part Numbert | Mfg | Packt | D/C | Descriptiont | Qty | Company/Contact |
TPV56A1125-83 Datasheet
TPV56A1125-83 Price Single Chip 100Base-TX/10Base-T Ethernet Physical Layer (PHY) Solution Dual Speed - 10/100 Mbps Full Mll Interface for a Glueless MAC Connection Ml Interface for Configuration and Status Half Duplex and Full Duplex in Both 10BASE-T and 100BASE-TX Repeater Mode Extended Register Set Integrated 10BASE-T Transceivers and Receive/Transmit Filters TPV56A1125-83 on stock Note : 1. Parameters depend on programmed CAS latency. 2. If clock rising time is longer than l ns, (tr/2-0.5)ns should be added to the parameter 3. Assumed input rise and fall time (tr & tf)=lns. If tr & tf is longer than lns, transient time compensation should be considered, i.e., [(tr + tf)/2-1]ns should be added to the parameter. From the basic, "Just Plug it In" functionality of the 6-A modules, to the 30-A rated feature-rich PTHxx030W, these products were designed to be very flexible, yet simple to use. The features vary with each product. Table 3-1 provides a quick reference to the available features by 5 product and input bus voltage. |
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