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TQS16B1001FS Datasheet

The PT8A3121 has built-in Mic-amplifier, comparator and 10-bit DAC. When DIR pin tied to Low level, the chip works in modulation mode, input analog signal of voice will be converted to digital data and output through pin DATA. When DIR tied to High level, the chip works in demodulation mode, the serial NRZ data input from pin DATA will be converted to analog signal of voice and output through BOUT pin, buffered by an enabled buffer amplifier.
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General Notes: 1. The PSEF-3E series of phase shifters provides continuously variable phase shift across a range of oo t0 1800 with the application of a control voltage of o to +15V. Similar phase shifters are available in a variety of other packages. 2. These units are designed for high reliability and can be supplied screened to meet specific military and space applications. 15Feb96
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INPUTS			OUTPUT
	CLOCK	DATA	Q
H	X	X	NO CHANGE
L	f	L	L
L		H	H
X	Z	X	NO CHANGE

ENW : Enable watch-dog if set. CLRW: Clear watch-dog timer and prescaler if set. This flag will be cleared automatically WIDL : If this bit is set, watch-dog is enabled under IDLE mode. If cleared, watch-dog is disabled under IDLE mode. Default is cleared. PS2, PSl, PSO: Watch-dog prescaler timer select. Prescaler is selected when set PS2 - 0 as follows:

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