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TR0808820Y Datasheet

ltem	Symbol	Characteristics			Conditions	Unit
ltem	Symbol	Min	Typ	Max	Conditions	Unit
Zero gate voltage collector current	ICES			2 0	VGE=Oy VCE=600V	mA
Gate-Emitter leakage current	IGES			30	VCE=Oy VGE=+20V	UA
Gate-Emitter threshold voltage	VGE(th)	4.5		7.5	VCE=20y lc=300mA	v
Collector-Emitter saturation voltage	VCE(sat)			2.8	VGE=15V lc=300A	v
Input capacitance	Cies		19800		VGE=OV	pF
Output capacitance	Coes		4400		VCE=10V
Reverse transfer capacitance	Cres		2000		f=lMHz
Iurn-on time	ton		O6	1.2	Vcc=300V	ps
Iurn-on time	tr		0.2	0.6	lc=300A
Turn-off time	toff		0.6	1.0	VGE=+15V
Turn-off time	tf		0.2	0.35	RG=6.80hm
Diode forward on voltage	VF			3.0	IF=300A, VGE=OV	v
Reverse recovery time	trr			0 3	IF=300A	ps

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Logic supply voltage range, VCCl (see Note l) .. . Output supply voltage range, VCC2 ' " ' ' ' ' Input voltage range at A or EN, VI (see Note 2) ... Output voltage range, VO . . . . . . . Emitter terminal (1E and 2E) voltage range, VE " ' Emitter terminal (1E and 2E) voltage (nonrepetitive, tw " 50 s) .. . Input current at A or EN, lI . . . . . . Peak output current, IOM: (nonrepetitive, tw " 0.1 ms) . . . . (repetitive, tw " 10 ms, duty cycle " 80%) . . . . . Continuous output current, IO ' ' " Peak combined output current for each full-H driver (see Note 3): (nonrepetitive, tw " 0.1 ms) . . . . (repetitive, tw " 10 ms, duty cycle " 80%) . . . . . Continuous combined output current for each full-H driver (see Note 3) . . . Continuous dissipation at (or below) 25IC free-air temperature (see Note 4) Continuous dissipation at (or below) 75IC case temperature (see Note 4) Operating free-air, case, or virtual junction temperature range . . . . Storage temperature range .. . . . . Lead temperature l,6 mm (1/16 inch) from case for 10 seconds ..
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All Intersil semiconductor products are manufactured, assembled and tested under IS09000 quality systems certification. Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with- out notice. Accordingly the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No Iicense is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site www.intersil.com

NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M,1994. 2. CONTROLLING DIMENSION:INCH. 3. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL 4. DIMENSION F MA'{ NARROW T0 0.76 (0.030) WHERE THE LEAD ENTERS THE CERAMIC BODY. 5 THIS DRAWING REPLACES OBSOLETE

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