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1 Typical specifications represent average readings at 250C and VDD = 5 V. 2 Resistor position nonlinearity error R-INL is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper positions. R-DNL measures the relative step change from ideal between successive tap positions. Parts are guaranteed monotonic. 3 yA = VDD, Wiper (Vw) = no connect. 4 INL and DNL are measured at Vw with the RDAC config ured as a potentiometer divider similar to a voltage output D/A converter. VA = VDD and VB = O V. DNL specification limits of +1 LSB maximum are guaranteed monotonic operating conditions. 5 Resistor terminals A and W have no limitations on polarity with respect to each other. 6 Guaranteed by design and not subject to production test. 7 PDISS is calculated from (IDD X VDD). CMOS logic level inputs result in minimum power dissipation. 8 All dynamic characteristics use VDD = 5 V.